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    ICCAD
    2006
    IEEE
    304views Hardware» more  ICCAD 2006»
    Trunk decomposition based global routing optimization
    16 years 24 days ago
    Trunk decomposition based global routing optimization
    Download  www.cecs.uci.edu
    We present global routing optimization methods which are not based on rip-up and re-route framework. In particular, the routing optimization is based on trunk decomposition [13] o...
    Devang Jariwala, John Lillis
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    ICCAD
    2006
    IEEE
    208views Hardware» more  ICCAD 2006»
    Automation in mixed-signal design: challenges and solutions in the wake of the nano era
    16 years 24 days ago
    Automation in mixed-signal design: challenges and solutions in the wake of the nano era
    Download  www.cecs.uci.edu
    The use of CMOS nanometer technologies at 65 nm and below will pose serious challenges on the design of mixed-signal integrated systems in the very near future. Rising design comp...
    Trent McConaghy, Georges G. E. Gielen
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    ICCAD
    2006
    IEEE
    190views Hardware» more  ICCAD 2006»
    Factor cuts
    16 years 24 days ago
    Factor cuts
    Download  www.eecs.berkeley.edu
    Enumeration of bounded size cuts is an important step in several logic synthesis algorithms such as technology mapping and re-writing. The standard algorithm does not scale beyond...
    Satrajit Chatterjee, Alan Mishchenko, Robert K. Br...
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    ICCAD
    2006
    IEEE
    189views Hardware» more  ICCAD 2006»
    Allocation cost minimization for periodic hard real-time tasks in energy-constrained DVS systems
    16 years 24 days ago
    Allocation cost minimization for periodic hard real-time tasks in energy-constrained DVS systems
    Download  newslab.csie.ntu.edu.tw
    Energy-efficiency and power-awareness for electronic systems have been important design issues in hardware and software implementations. We consider the scheduling of periodic ha...
    Jian-Jia Chen, Tei-Wei Kuo
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    134
    Voted
    ICCAD
    2006
    IEEE
    184views Hardware» more  ICCAD 2006»
    Un/DoPack: re-clustering of large system-on-chip designs with interconnect variation for low-cost FPGAs
    15 years 10 months ago
    Un/DoPack: re-clustering of large system-on-chip designs with interconnect variation for low-cost FPGAs
    Download  www.ece.ubc.ca
    Marvin Tom, David Leong, Guy G. Lemieux
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