201
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ISCA
15 years 12 months ago
2006 IEEE 
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...
171
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ISCA
15 years 12 months ago
2006 IEEE 
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
170
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ISCA
15 years 12 months ago
2006 IEEE
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
159
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ISCA
15 years 12 months ago
2006 IEEE
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
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